1. Field of the Invention
The present invention relates to a chip package, and in particular relates to a chip package formed by a wafer-level packaging process.
2. Description of the Related Art
A chip package is used to protect a chip packaged therein and provides conducting routes between the chip and an external electronic element. The present chip package may suffer problems of moisture infiltration and/or bad adhesion, which largely affect the operation of the packaged chip.
Thus, it is desired to improve the reliability of chip packages.